FPGA Blackjack in Verilog
A complete single deck Blackjack game running purely in hardware on a DE1-SoC FPGA board, built in Verilog with custom shuffling, timing, display, and game logic modules. Built by myself and Zach Henderson. We pitched this option for the project as we found the other options were not as interesting.
See this code on GitHub: https://github.com/ethanajohnston/BlackjackVerilog
Project Overview
For our ECED 4260 final project, my partner and I built a complete Blackjack game that runs entirely on an FPGA, with no processor or software loop. We designed the game as a hardware finite state machine that behaves like a simple handheld casino-style device using only three buttons and six seven segment displays. We removed betting, splitting, and insurance to keep the focus on clean hardware design, deterministic logic, and a smooth user experience.
Architecture and Implementation
The system is built from four main Verilog modules:
- blackJackController
Central finite state machine with states for IDLE, LOAD, DEAL, PLAYER_TURN, DEALER_TURN, and END_GAME. It manages the deck, hands, ace handling, and dealer strategy. - shuffle
Uses a 6 bit Linear Feedback Shift Register and a used card table to build a full 52 card deck in a random order with no duplicates, then streams cards into the controller. - microSeconds
A 50 MHz based timer that measures how long the user holds the deal button. That duration becomes the seed for the shuffle, giving a different deck every game. - display
Drives the six seven segment displays, showing hand values plus messages like dEAL, LoAd, rESEt, ti, and bJ for blackjack.
Gameplay Experience
On the DE1-SoC board:
Buttons:
KEY3: Deal
KEY1: Hit
KEY0: Stand
SW0: Reset
Displays:
Show player and dealer totals in BCD
Show prompts for each phase of the game
Reveal the dealer hole card only after the player stands or busts
Ace values are tracked so they can switch from 11 to 1 if the hand would bust, and the dealer is scripted to hit until at least a soft 17, matching standard casino rules.
Testing and Results
Each module was verified with dedicated ModelSim testbenches, including waveform checks for the shuffler, display outputs, and controller state transitions.
On hardware, we played roughly 300 hands, watching for correct state transitions and display updates. The game behaved as expected: cards dealt correctly, hand values updated, and win, lose, tie, and blackjack outcomes matched the rules. The only issue observed was that the hit button sometimes needed a second press, a future improvement target.
Other photos
